ADN4661BRZ

ADN4661BRZ is a single, CMOS, low-voltage differential signalling (LVDS) line driver offering data rates of over 600Mbps (300MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device accepts low voltage TTL/CMOS logic signals and converts them to a differential current output of typically ±3.1mA for driving a transmission medium such as a twisted pair cable. The ADN4661 and a companion LVDS receiver offer a new solution to high-speed point-to-point data transmission and a low-power alternative to emitter-coupled logic (ECL) or positive-emitter-coupled logic (PECL). Typical applications are backplane data transmission, cable data transmission, clock distribution.

• ±15KV ESD protection on output pins, flow-through pinout simplifies PCB layout
• 3.3V power supply, conforms to TIA/EIA-644 LVDS standards
• Interoperable with existing 5V LVDS receivers
• Offset voltage is 1.2V typ at VCC=3V to 3.6V; RL=100 ohm; CL=15pF to GND
• Differential output voltage is 355mV typ at VCC=3V to 3.6V; RL=100 ohm; CL=15pF to GND
• Power-off leakage current is ±1μA typ at VOUT=VCC or GND, VCC=0V
• Rise time is 0.5ns typ at VCC=3V to 3.6V; RL=100 ohm; CL=15pF to GND
• Maximum operating frequency is 350MHz typ at VCC=3V to 3.6V; RL=100 ohm; CL=15pF to GND
• 8-lead standard small outline package [SOIC-N]
• Temperature range from -40°C to +85°C

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