ADN4664BRZ

ADN4664 is a dual, CMOS, low voltage differential signalling (LVDS) line receiver. It features a flow-through pinout for easy PCB layout and separation of input and output signals. This device accepts low voltage (310mV typical) differential input signals and converts them to a single-ended 3V TTL/ CMOS logic level. This device and its companion driver, the ADN4663, offer a new solution to high speed, point-to-point data transmission, and a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL). It is widely used in application such as point-to-point data transmission, multidrop buses, clock distribution networks, backplane receivers etc.

• ±15KV ESD protection on output pins
• Maximum operating frequency is 250MHz typical
• Differential channel-to-channel skew is 100ps typical
• Propagation delay is 2.15ns typical
• 3.3V power supply, high impedance outputs on power-down
• Interoperable with existing 5V LVDS drivers, conforms to TIA/EIA-644 LVDS standard
• Accepts small swing (310mV typical) differential signal levels
• Supports open, short, and terminated input fail-safe, 0V to -100mV threshold region
• Operating industrial temperature is -40°C to +85°C
• Package style is 8-lead standard small outline [SOIC-N]

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